Performing Memristor-Aided Logic (MAGIC) using STT-MRAM

Modern computers suffer from a limited data transfer rate between the memory and the processing units. One of the attractive potential solutions to overcome this bottleneck is to combine processing and memory by performing computing in the same location where the data is stored. Processing-in-memory (PIM) has been demonstrated by memristor-aided logic (MAGIC) operations using resistive random access memory (RRAM) memristive devices within crossbar arrays. Nevertheless, RRAM devices are relatively slow and suffer from limited endurance. Spin-transfer torque magnetoresistive random access memory (STT-MRAM) is another memristive technology, which is faster and has practically unlimited endurance and is therefore considered to be an attractive technology for cache-level memories. In this paper, we demonstrate MAGIC operations within an STT-MRAM array by supplying voltages suitable to achieve the current required for MRAM device switching. The proposed circuit was evaluated in SPICE simulations with the GlobalFoundries 22nm CMOS-MRAM process, including Monte Carlo simulations to verify the proposed design in the presence of process variation and device mismatch. The circuit showed more than 90% chance of functioning for the {1 1} and {0 0} input cases while it was about 85% correct for the {0 1} case.