A Comparison of Two Methods for FPGA Controlled Interface Board Tests

FPGA Controlled Interface Boards (FCIB) are widely used in electronic systems in order to meet the control, communication and I/O requirements. These boards employ FPGAs to control multiple signal input/output blocks, communication interfaces (RS232/422, CAN, ETH, PCIe etc.), ADC/DAC circuits, and other general purpose circuits. Production tests of FCIBs are vital since a single fault in the Unit Under Test (UUT) may cause serious consequences (engineering, rework, time, money costs) at higher levels of integration. Test requirements of UUT are specified as the first step of the test design process to define the test coverage. As the second step, test is designed at high level by specifying the building blocks of the test program set (TPS). In this step, hardware and software components are designed and implemented. Finally, TPS is verified after integrating all components. These three steps can be concluded briefly as Test Program Set requirements, design and implementation, verification. In addition to these test development steps, test design process should be carried based on the general automated test development considerations. These principles can be grouped in five subjects. Firstly, all the test steps in the testing procedure should be repeatable. Secondly, since these tests will be used in mass production, the test duration should be as short as possible while verifying all interfaces precisely and reliably. Thirdly, tests should require minimum amount of operator interaction. It should be fully automated-if possible- to reduce the test duration and errors due to operator interaction. Fourthly, test steps should not only catch the errors but also localize them to a circuit block on the board. This helps to repair the faulty parts quickly in production. Finally, all tests should be done with minimum amount of test equipment. After defining the UUT specifications and TPS requirements, there are two methods that could be applied in the test design process of the FCIB. The first one is to control all interfaces with embedded test code running on FPGA of UUT and using interface specific test devices to verify the circuit block. In order to test the interfaces of the FCIB, the test devices should be able to manage the signals in two directions, from FCIB and to FCIB. The test flow is controlled from external world through a UUT interface-generally UART. To make the test faster and minimize the operator interaction, a high-level test software is designed in LabVIEW or a similar environment to automatize the test procedure. The second method is using another verified FCIB, namely a Golden Board, which helps to communicate through all interfaces of the UUT and verify it functionally. In this method, test designer should define the hardware interface between the boards, and construct a test procedure accordingly. Next, embedded code for the FPGAs on the Golden Board and UUT should be developed in order to simulate the functionality of the UUT. The synchronization and handshaking of two FPGA codes also becomes important to manage test flow. A high-level test software may also be developed in LabVIEW or a similar environment depending on the test design. Both of two methods have their own advantages and disadvantages. In this paper, the two methods of designing an automated test for FPGA Controlled Interface Boards will be discussed. They will be compared according to their workload of development, capability of locating errors, test duration and efficiency of the testing (coverage, probability of error occurrence).