A Highly-Integrated 60 GHz Receiver for Radar Applications in 28 nm Bulk CMOS

This paper presents a low-power highly-integrated 57-64 GHz receiver for short-range frequency-modulated continuous-wave (FMCW) radar applications and fabricated in a 28 nm CMOS technology. Measurement results show that the receiver (Rx) achieves a 18.9 dB conversion gain (CG) with a -12 dBm input referred 1-dB compression point (IP1dB) at 60 GHz. A 7.6 dB double sideband noise figure (NF
_dsb
) is achieved at 10 MHz offset. Furthermore, the circuit draws 44 mA from a single 0.9 V supply and the chip core size is 0.58 mm × 0.33 mm.