A Resistive Degeneration Technique for Linearizing Open-Loop Amplifiers

This brief presents a linearization technique for open-loop amplifiers. It utilizes the exponential V-I transfer of MOS transistors in weak-inversion together with a weak form of resistive degeneration. By using a specific relationship between the input transconductance and the source degeneration resistance, the amplifier is shown to have a significant reduction (~50×) in its third-order distortion component. Based on this linearization principle, two amplifier topologies are proposed by implementing the degeneration in (a) pseudo-differential and (b) common-mode configuration. The pseudo-differential degeneration scheme allows the amplifier to achieve more than 80dB linearity for 150mVpp-diff input swing at the expense of 35% lower power-efficiency. The common-mode degeneration eliminates this power penalty but exhibits ~10dB worse linearity. To ensure an optimal linearity over process variation, a foreground calibration scheme is used to detect the nonlinearity. The nonlinearity correction is done by adjusting the bias current of the amplifier. The proof-of-concept amplifiers are constructed on a stripboard to demonstrate the effectiveness of the proposed linearization technique. With an input signal of 50mVpp-diff, the two topologies achieve -105dB and -95dB HD3, respectively, improving the linearity of the state-of-the-art open-loop amplifiers by at least 30dB.