Implementation of Blind I/Q Calibration Scheme Based on FPGA

Phase and amplitude imbalance of the I/Q branch in the RF transceiver often occur, resulting in the generation of the image signal, which seriously affects the quality of the communication. In order to suppress the image signal, this paper implements an I/Q signal calibration scheme based on the FastICA algorithm on the FPGA, which restores the orthogonality of the I/Q branch by separating the original I/Q channel signals. In the hardware implementation process of the algorithm, all the calculation processes are implemented by fixed-point calculations, and the accuracy of the calculation is ensured by flexible adjustment of the dynamic range of the data. The test results show that the calibration scheme designed in this paper can completely suppress the image signal under the noise floor, and the iteration time is 78$\mu$s under the clock of 100MHz, and the operation error is controlled within 0.5% compared with the software algorithm.