Uniformizing Routing Hotspots of Ring Oscillators on the Cyclone V FPGA for PUF Applications

Research on the possibility of using Ring Oscillator (RO) as a Physically Unclonable Function (PUF) has been carried out. However, until now, nothing has been realized because none of them meets the expected reliability. One of the factors that influence its reliability is the variety of routing hotspots. This paper proposes a technique for uniformizing routing hotspots in all RO locations. Ten ROs are placed close to each other, and each of them is equipped with a counter. Four variations in the arrangement of RO inside a Logic Array Blocks (LAB) are created. Then, routing hotspots in all RO locations are designed to be uniform. The uniformity process is done by rearranging the location of the logic fan-in and fan-out of the RO and counter. RO is activated vary from 0.4ms to 2ms. The number of pulses generated by ROs are recorded. Based on experiments on four Cyclone V chips, the average uniqueness was 43.79% and 46.04% for 5-stage and 11-stage RO, respectively. Reliability of 11-stage RO is higher when tested between 25°C and 40°C.