Realization of the Kronecker Product in VHDL using Multi-Dimensional Arrays

In this paper, the realization and simulation of the Kronecker product (Kronecker tensor product) for two and three input arrays is realized in hardware using a VHDL design description. The array descriptions are based on the use of multidimensional arrays in VHDL. The structure and simulation of the VHDL module design are presented with a comparison to realizations in MATLAB®. The Kronecker product, which is denoted by the operator ®, is mathematical operation on two matrices of arbitrary size that results in the creation of a block matrix. This operation is commonly achieved in software programming languages such as MATLAB®, ANSI C and Python. In this paper, a hardware implementation is created and simulated in a hardware description language (HDL) with the intention to create a hardware block that can be integrated into a larger digital circuit/system targeting the field programmable gate array (FPGA).