IEEE Standard VHDL Language Reference Manual

VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notationintended for use in all phases of the creation of electronic systems. Because it is both machine read-able and human readable, it supports the development, verification, synthesis, and testing of hard-ware designs; the communication of hardware design data; and the maintenance, modification, andprocurement of hardware. Its primary audiences are the implementors of tools supporting the lan-guage and the advanced users of the language.