A 5.5-dBm, 31.9% Efficiency 915-MHz Transmitter Employing Frequency Tripler and 207- $\mu$ W Synthesizer

A 915-MHz binary frequency-shift keying (BFSK) transmitter is proposed in this letter. The proposed transmitter architecture allows relaxing the frequency-tuning requirement of the conventional Internet of Things transceiver by the frequency-tripling signal-path topology. The tuning-range requirement is significantly improved down to 4% with the proposed signaling scheme, and this results in the ultralow-power synthesizer implementation. The proposed frequency tripler provides good spur rejection performance, and the adoption of a class-D switching power amplifier (PA) further improves the efficiency of the BFSK transmitter. Implemented in a 55-nm CMOS technology, the proposed transmitter achieves the output power of 5.5 dBm and 31.9% efficiency with only 207 μW of power consumption from the synthesizer.