Shifting Clock Jitter and Phase Interval for Impulse-Radar-Based Breast Cancer Detection

An equivalent time sampling circuit has been developed for impulse-radio ultra-wideband radar systems. The received signals are digitized by a shifting clock. The accuracy of the clock that affects the sampling interval of analog-to-digital converter (ADC) is measured in terms of jitter and delay time. It is found that the delay time is fluctuated in every 64 times which is related to the multiplexer operation. The jitter which is calculated from the measured phase noise decreases from 85dBc/Hz to -110dBc/Hz in the low offset-frequency. It is also found that the noise from ADC degrades the some part of sampling timing and the error source is identified.