Phase Delay Analysis of Current Sampling in Inverter-Fed Induction Machines

For an inverter-fed induction machine, the stator currents are often sampled at the crest or trough of the carrier wave in the inverter. Existing research reveals that this way of current sampling has aliasing that can cause a small delay in the current phase angle. In this paper, the phase delay is proven to considerably degrade the accuracy of inverter active power calculation during no-load tests, making it impossible to tune the machine core-loss parameter with its driving inverter. The time-domain analytical form of this phase delay is derived under space-vector pulse-width modulation (SVPWM) and verified by simulations and experimental tests. The proposed analytical method is further used to evaluate two existing solutions to aliasing. One of the solutions is slightly modified for practical use and proven to be effective for improving the accuracy of inverter active power calculation.