Study on Trapped Charge SONOS NVSM with Effect of Vg and Vds Programming state Variation

This study investigates the effects of variation of Vds and Vg on trapped charge in SONOS NVSM using Synopsis Sentaurus TCAD Simulator. We variate both drain voltage (0 volt/1volt/3volt/5 volt), gate voltage (3volt/4volt/5 volt). The result show that the trapped charge in SONOS memory vary when the programming voltage is changed. Moreover, we investigate the amount charge in 10 years after programming state. In this condition, Programming state of 3V gate and 5V drain have the smallest change in the rate of trapped charge after 10 years compared to the other variated voltage.