A Hardware Inference Accelerator for Temporal Convolutional Networks

Traditionally, Recurrent Neural Networks (RNNs) are used for time-series prediction. However, recent results have shown that Temporal Convolutional Networks (TCNs) outperform RNNs in terms of accuracy and training time. By using dilated convolutions TCNs are able to capture long term temporal dependencies from time series. The use of existing Convolutional Neural Networks (CNNs) inference accelerators for the computation of dilated convolutions significantly decreases the throughput and causes computation overhead. In order to take into account the one-dimensionality of the convolutions and presence of dilation, this paper proposes a dedicated hardware inference accelerator for TCNs. We use this accelerator to run an adaptation of WaveNet for anomaly detection in an ECG time series dataset. Our results show that it can achieve 6.3 · 10
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DRAM access/MAC, 0.043 on-chip SRAM access/MAC and 8 ms/inference. This lower number of on-chip and off-chip memory accesses significantly decreases the overall power consumption and increases the throughput.