A Method for Increasing the Low-Temperature Stability of Steady-State Behavior and Common-Mode Interference Resistance CJFET Dual-Input-Stages

An original input differential stage circuit (DS) on complementary junction field-effect transistors (CJFET) is proposed. Their main designated area is low-noise analog ICs for operation at low temperatures, including cryogenic ones. The special circuit design for setting steady-state behavior of the DS and its parametric optimization in the LTspice environment provide a relatively high stability of the CJFet steady-state behavior of the input transistors in a wide temperature range. It is shown that, in this case, the common- mode rejection ratio is increased.