Realization of multi-valued logic combinational circuits on fully depleted silicon on insulator

As we are moving towards lower technology nodes number of transistors and interconnect complexity will increase. Delay associated with interconnects are more dominant than the gate delays. This problem can be resolved by replacing binary logic with the multi-valued logic which reduces number of interconnects and hence interference problem. The multi-valued logic circuits require more number of transistors to design. It consumes more power by using traditional bulk CMOS technology, to avoid this problem one of the solution is to use Fully Depleted Silicon on Insulator (FDSOI). The FDSOI transistors operates with high speed at low power. In this paper NAND, NOR and Inverters are realized using Bulk CMOS and FDSOI using Quaternary logic, their performances are compared.