PUF-based Key Generation with Design Margin Reduction via In-Situ and PVT Sensor Fusion

This work introduces a Physically Unclonable Function (PUF) based key generation scheme with run-time in-situ instability detection and process/voltage/temperature (PVT) sensors. Such sensors are fused to evaluate the sufficient number of correction bits NECC required by Error Correcting Code (ECC) to make the PUF output stable, and meet a given key error rate target. Run-time sensing overcomes the substantial ECC energy penalty associated with the traditional design-time margin of N
ECC
for worst-case word, die, voltage and temperature. ECC with tunable N
ECC
is introduced to enable energy saving in typical cases where N
ECC
is lower than its worst-case value. Sensor fusion via simple linear regression estimates the required N
ECC
at run-time.A testchip in 40 nm demonstrates the concept, based on a static monostable current mirror PUF with N
ECC
= 0…4. Average energy reduction by 1.8X is shown compared to a traditional margined design, at an area overhead of less than 20%. As additional benefit of adjustable N
ECC
, such energy savings can be further expanded under applications having less stringent stability requirements.