Nonlinear capacitors integration

Silicon reactive ionic etching (RIE) offers an interesting solution for nonlinear capacitors integration in the field of power electronics applications. In this paper we study more particularly the behavior of trench topology, combining MOS and bipolar effects. The influence of the geometrical parameters on the C-V characteristic of the device will be analyzed thanks to 2D simulations carried out using ATLAS software. We also suggest a suitable peripheral termination for deep trench devices in order to increase the breakdown voltage capability. Finally we present the main process steps of the first prototypes fabrication as well as the C-V electrical characterization results.