Device Screening Strategy for Balancing Short-Circuit Behavior of Paralleling Silicon Carbide MOSFETs

This paper studies the spread of key electrical parameters of Silicon Carbide (SiC) MOSFET devices and its effect on the short-circuit (SC) behaviors. Device screening strategies are proposed to reduce the variation of the SC behaviors among the parallel-connected devices. Firstly, thirty discrete SiC devices from same production lot are characterized in terms of threshold voltage, transconductance, and on-resistance. The maximum variations of these device parameters are 0.5V, 1.41S and 25mΩ, respectively. The SC tests are performed individually on each device. The variations of SC peak current, SC energy, and SC junction temperature among these devices are 40A, 0.06J and 77°C. Furthermore, the effect of each parameter on SC behaviors variations is discussed. Based on the offset effect of parameters variation and the single transfer curves variation (TCV), a novel device screening strategy is developed. The variation of SC behavior of paralleling devices can be reduced by using the developed device screening strategy. This paper aims to provide guidelines on device screening for paralleling SiC MOSFETs.