An Efficient Fused Floating-Point Dot Product Unit Using Vedic Mathematics

The four-term fused dot product (FDP) unit is designed for single precision floating-point by using the Vedic multiplier. The Dot product operations are frequently used in a graphics, statistical applications and Digital signal processing (DSP) applications. In this work, a low power and area efficient floating-point four term fused dot product unit is proposed by using Vedic mathematics. A merged floating-point scalar product unit uses Vedic multiplier, logical exponent of comparison and mantissa alignment, normalization, leading zero anticipation (LZA), compound addition and rounding to enhance the performance. The area and power are calculated to evaluate the proposed design. The proposed design is realized for a single precision floating point multiplier and synthesized with Vivado 2015.4.