Modelling Reversion Loss and Shoot-through Current in Switched-Capacitor DC-DC Converters with Petri Nets

For a Switched-Capacitor DC-DC converter (SCC) in a low power design, reversion losses and shoot-through currents may lead to substantial efficiency degradations and voltage reductions at the output. These reversion losses and shoot-through currents are caused by undesired conduction in MOS devices under certain combinations of internal SCC signals including clocks. This paper proposes a new method that models reversion losses and shoot-through currents in SCCs with Petri nets, providing a formal way of tracking them. With reachability analysis on the Petri Net models, reversion losses and shoot-through currents can be verified and investigated, which is helpful for avoiding these problems in designs. This paper takes cross-coupled voltage doublers as examples. Analysis examples where these properties are identified are presented, together with the finding of healthy traces, which do not contain them. Besides tool-supported reachability analysis capabilities, the natural causal event traceability of Petri net models allows the design of SCCs and other analog and mixed signal (AMS) circuits to be more transparent and understandable, and hence easier to reason about, debug and validate.