SRAM-ADC: SRAM Circuits Transformable to a Stochastic ADC at Ultralow Area Overhead

A low-cost microprocessor-based system-on-chip is a key building block for the Internet of Things. To perform sensing, computing, and communications, it requires multiple analog, digital, and mixedsignal circuits. Integrating those circuits, however, increases silicon area and cost. It is particularly expensive to add dedicated hardware for low duty-cycled functions such as environment sensing. In this letter, we reduce such overhead and introduce a design approach that can dynamically transform an 8-kB 6T SRAM into a 6-b stochastic ADC having a 300-mVPP input range. Incurring only a 740-μm
²
(0.93%) area overhead, this approach provides a data-conversion capability at very low cost.