Single-Event Effects in SiC Double-Trench MOSFETs

Single-event effects (SEEs) in a 650-V state-of-the-art SiC double-trench MOSFET (DT-MOS) are investigated using the Sentaurus TCAD tools. The safe operation areas (SOAs) for single-event burnout (SEB) and single-event gate rupture (SEGR) are extracted when heavy ions with different linear energy transfer (LET) impact the sensitive regions of the device. The results show that the radiation performance of the SiC DT-MOS is poor because of the very low threshold voltages of failures at a high LET range. Moreover, hardening measures, such as introducing a buffer layer and adjusting the mesa width, are discussed to assess their versatility. It is demonstrated that in contrast, the SEGR problem is more severe due to the intrinsic properties of SiC devices. Therefore, it becomes a crucial issue to find ways more suitable for the SiC DT-MOS to avoid gate oxide pre-breakdown, before they could serve as a replacement of Si counterparts in space applications.