An Improved $\alpha\beta$ -EPLL Based on Active Disturbance Rejection Control for Complicated Power Grid Conditions

The enhanced phase-locked loop (EPLL) adds an amplitude estimate to the conventional phase-locked loop (PLL), which solves the problem of double-frequency disturbance in the Phase-Locked Loop mathematical model at steady state. However, there are few researches on disturbance resistance design of EPLL in complicated grid environment. Therefore, periodic disturbances of different frequencies are introduced into frequency estimation and amplitude estimation of EPLL when the grid voltage has DC offset, three-phase unbalance, high-order harmonic disturbance and sub-synchronous oscillation (SSO). This will interfere with the frequency and amplitude estimation performance of the EPLL, and then affect the closed-loop control and frequency tracking of the converter. In order to improve disturbance rejection of the EPLL. Firstly, the mathematical model of the disturbance in the frequency and amplitude loop is deduced and analyzed. Then the active disturbance rejection control (ADRC) is used to improve the EPLL. Through the simulation model of MATLAB/Simulink, the parameters of the ADRC and the ESO are compared and validated. The proposed EPLL based on ADRC is verified experimentally for the tracking performance under the frequency stability or drop in complicated power grid environment.