A low power full accuracy MPEG1 audio layer III (MP3) decoder with on-chip data converters

A low power full accuracy MPEG1 audio layer 3 (MP3) decoder with on-chip A/D converter (ADC) and D/A converter (DAC) is proposed. The chip is composed of a digital block to implement the MP3 decoding algorithm and voice compression/decompression algorithm, a 12-bit recycling type ADC, and an oversampling /spl Delta//spl Sigma/ 1-bit DAC. In order to satisfy the full accuracy specification of the MP3 decoder, a novel 32-bit floating DSP core is proposed. Further, an efficient power management technique is implemented to reduce power consumption for portable applications. The proposed decoder has been fabricated with a 4 metal 0.35 /spl mu/m CMOS technology and the chip area is about 6.4/spl times/6.7 mm/sup 2/ with 165 mW power dissipation at 2.7 V power supply.