Driver integration in a monolithic MBS (Mos bidirectional switch) : study of the perturbations in the off-state

This study deals with the perturbations that occur in a monolithic device. The device used is a power-logic association, where the logic is separated from the power by a PN junction that provides the electric isolation. A low voltage buffer constitutes the logic part of the chip which is connected to the gate of a MBS (MOS bidirectional switch). This new voltage controlled switch is an IGBT that is able to sustain reverse voltage higher than 600 V. A modeling of the parasitic coupling between the MBS and a low voltage logic on the same chip is presented for the first time for negative and positive anode voltages in the off-state. This leads to a capacitive model which takes into account in its parameters the physical and geometrical specifications of the device (gate capacitance, output impedance of the logic, etc.). To conclude, the study of these phenomena allows one to understand and to control the parasitic effects of the device that may happen in the off-state.