Signal Digitizer based on FPGA TDC for Hyper-Kamiokande experiment

The next generation of neutrino experiment Hyper-Kamiokande requires high performance of signal digitizer to extract timing and charge information from signal of photomultiplier tube (PMT). The signal digitizer designed for the experiment is based on TDC implemented on field-programmable gate arrays (FPGAs) instead of widely used predefined hardware.The prototype of the digitizer is developed in this study. And the performance is measured in detail. It is promising and found to have high performance enough to satisfy the requirements of HK experiments.