A Power and Static Noise Margin Analysis of different SRAM cells at 180nm Technology

SRAM cell stability and leakage power consumption is one of the primary concern in nanotechnology era. Threshold voltage (Vth) of MOS changes with temperature and thereby leakage power of MOS. We analyze static noise margin (SNM) and leakage power at different Temperature and Power supply for different SRAM cells 6T, 8T, 9T and 10T. Simulations are done on cadence virtuoso tool. The result shows that 9T SRAM cell have better performance, power consumption and static noise margin compared to other three structures. Results shows that 9T SRAM cell has at least 20% less leakage Power with respect to 10T SRAM cell and have 150% increased static noise margin over conventional 6T SRAM cell.