Design of Cryptographic model for End-to-End Encryption in FPGA based systems

Digitization has transformed our world. The famous World Wide Web, various social networks and numerous e-commerce applications are responsible to generate huge volume of data regularly. The emerging data security mechanisms ensures a safe transmission of information through the internet. Symmetric key cryptography is one of the key techniques used for the security of large data transmission over the internet. Some popular symmetric key algorithms; TDES, IDEA, AES etc. The proposed model uses several symmetric key algorithms in cascaded manner. The model is first divided into 64 bits plaintext block and then into two sub-blocks of 32 bits. The left and right blocks go through a list of symmetric key cryptography techniques like TR, RPPT, TB and RPSPNC and bit rotation in one step. TR stands for Triangular Encryption, which is responsible to generate a triangle shape bit stream where different encryption-decryption techniques are achieved by the order of reading bit RPPT (Recursive Pared Parity Technique) a very simple space efficient encryption algorithm produces cipher text by performing logical OR of consecutive bits. Transformation of Bits (TB) uses swapping method of bits of different order for encryption and decryption process. Recursive Positional Substitution on Prime-Nonprime of Cluster (RPSPNC) methodology swaps bits based on prime/non prime bit position and generates intermediate bit stream as a cipher text. Finally merge the two halves sub-blocks to get the 64 bits cipher text. To test the feasibility of the proposed model it is compared with AES and another embedded encryption technique RPPT+TB for entropy, non-homogeneity, n-gram(4-gram) test, frequency distribution graph and FPGA based hardware test.