Linear-in-dB CMOS RF Amplitude Comparator with ±20 dB Range

This paper presents a CMOS RF amplitude comparator, which comprises a matched pair of demodulating logarithmic amplifiers and a combination stage. The circuit can generates a dc voltage proportional to the magnitude ratio between two input signals over a wide frequency range. The chip occupies an active area of 0.42mm² (including pads) using a 0.18-μm RF CMOS technology. Under a single 1.8V supply voltage, the total power dissipation is 40mW. Measurement results demonstrate that the amplitude comparator can provide an accurate measurement of either gain or loss over a ±20 dB dynamic range up to 500MHz, while the logarithmic accuracy is within ±1dB.