EHTC: An Enhanced Huffman Tree Coding Algorithm and its FPGA Implementation

Many computer systems require storing a large volume of data sets, which are steadily increasing as computer applications are extended to new disciplines. Simultaneously, the proliferation of computer networks is resulting in a massive transfer of data over communication links. Consequently, reduction of transmitted data directly leads to an increased capacity of communication channels. This project aims to design and implement an Enhanced Huffman Tree Coding system that compresses the data by encoding it via a sorting table, which keeps track of compressed data by assigning characters with dedicated keywords. The proposed algorithm improves the speed of decoding operations based on the Variable Length Coding decoder-partitioning concept. The coding system is implemented using HDL language and Matlab and simulated on Altera Quartus16 for functional verification. The executed design is synthesized using Altera Cyclone FPGA.