Sub-10 nm advanced finfet design for different applications in various vdd and temperature operation ranges

An advanced FinFET design is identified to improve both variation and minimum operation voltage (V
_min
) in various temperature and supply voltage (V
_dd
) ranges, using sub-10 nm FinFET transistors. Through a clarification of each electrical parameter's impact on both variation and operation voltage, a suitable FinFET design is successfully demonstrated to reduce I
_eff
variation by 0.4×, as well as Idoff variation by 0.8× in various V
_dd
ranges. This paper also provides Tr. design to improve V
_min
by 35 mV with the switching energy 0.87× reduction.