On the Existence of Security Enhancing Converter Designs for Multi-Level Memories

Jamming and fault injection attacks on memory arrays can be efficiently detected by quadratic-sum-based robust codes. When the number of levels in a memory cell is not a power of two, each memory cell corresponds to a fractional number of bits and a conversion circuit must be implemented to convert the binary input into a q-ary word. This conversion expurgates the code and can degrade its error detection capability. In some cases, this unwanted degradation can be minimized by careful design of the converter but in other cases this is impossible. This brief presents bounds that help determine whether for a q-ary memory width and required security level, a security enhancing converter design exists.