Data Capture via High Speed ADCs Using FPGA

High speed data converters are required in almost all real time applications nowadays. Their high speed puts a demand on faster and reliable interfacing techniques. This paper presents interfacing of 12-bit 65-Mega Samples per Second (MSPS) Analog to Digital Converter (ADC) with Virtex-4 Xilinx Field Programmable Gate Array (FPGA). Data Clock output signal of ADC helps capturing data at both falling and rising edge of sample clock thus supporting Dual Data Rate (DDR). The Serial Peripheral Interfacing (SPI) technique is used for capturing the digitized data from ADC using Data Clock manager (DCM) block of FPGA. The digitized data is stored in First In First Out (FIFO) in FPGA and can be further processed specifically according to application like for measurement of Pulse Repetition Frequency(PRF), amplitude etc.