Hardware-Accelerated Index Construction for Semantic Web

In this paper, an optimized data structure for managing triples used in a Semantic Web Database and a hardwareengine for index construction are presented. We propose anFPGA-centric design, which we call Hardware-Triplestore. Aspart of the design, a scalable and parallel architecture forTriplestore construction is introduced. We propose a hybrid datastructure consisting of three layers, one for every element ofthe semantic triple. The data structure is optimized for ourhardware-centric design and is stored on an external DDR4-Memory. The Hardware-Triplestore is evaluated separately fromthe rest of the database system and achieves an insertion rateof 1.24 million triples per second, which is 17 times faster thanone of the fastest software Triplestore-RDF-3X-.