Reliability-Aware FinFET Design

The endless demand for high performance and low power CMOS devices at extremely scaled cell dimensions led the semiconductor industry to migrate to FinFET structures. This evolution has brought higher integration complexity and has forced the reliability engineers to be aware of interrelation among process conditions affecting electrical degradation and failure. In this work, major integration steps which impact FEOL/MOL reliability are discussed, and guidance is provided for reliability-aware FinFET design.