FPGA-SDR Integration and Experimental Validation of a Joint DA ML SNR and Doppler Spread Estimator for 5G Cognitive Transceivers

In a multi-connected, multi-technology, and pervasive mobile infrastructure, such as what is being planned for 5G, artificial intelligence and cognition will play a major role. An important goal of future mobile infrastructures is to self-adapt their characteristics to their operating conditions, at the physical link, as well as at the network and application layers, which gives rise to a new paradigm known as context-aware cognitive radio (CR). CR transceivers (CTRs) mostly incorporate a cognitive engine that relies on various sensorial entities, which attempt to provide sufficient information about the quality of the link through the estimation of various key channel parameters. Two important parameters are required in a wide range of CTR architectures: the signal-to-noise ratio (SNR) and the Doppler spread. Within this context, we tackle the hardware design and integration of a joint data-aided (DA) maximum likelihood (ML) SNR and Doppler spread estimator recently shown to outperform main state-of-the-art solutions both in terms of accuracy and complexity. We propose a deep-pipelined and resource-efficient architecture for the outlined joint DA ML estimator, and we integrate our design on an FPGA-based software-defined radio (SDR) platform. We finally validate and test this prototype in real time under realistic over-the-air propagation conditions reproduced by a highly-scalabile channel emulator. Compared to its MATLAB floating-point version, our hardware prototype suggests negligible losses in performance despite the existence of several hardware impairments, thereby confirming its very strong potential and attractiveness for possible integration in future 5G CTRs.