NEPES’ Fan‐Out Packaging Technology from Single die, SiP to Panel‐Level Packaging

Nepes Corporation's fan‐out wafer‐level packaging (FO‐WLP) technology was first introduced in the year 2010 on a 300 mm platform. Nepes' FO‐WLP system‐in‐package solution offers 40‐90% volumetric shrink from existing modules with flexible product design to end user. Embedded ground planes (EGPs) are placed onto adhesive tapes laminated on substrates in advance. This EGP is optional depending on the necessity and the package design. Double‐ sided fan‐out packaging technology will allow the main chip in the bottom package to stay faceup so that the top device and bottom package could communicate more efficiently electrically or optically. Via frame fan‐out package technology enables chip face‐up packages for sensor application and package stacking for 3D integration as well. FO‐WLP built in large‐scale panels, called panel‐level package, is designed for direct cost reduction from 300 mm scaled FO‐WLP. This chapter shows various application products of FO‐WLP from mobile consumer to automotive.