Designing Partially Reversible Field-Coupled Nanocomputing Circuits

Energy scalability of future digital systems is bounded by fundamental thermodynamic limits. Even worse, emerging technologies and process improvements, without reversible techniques, cannot solve this problem. Approaches such as field-coupled nanocomputing allow computations near the fundamental energy limits. However, there is a demand for strategies that avoid information losses within logic gates, consequently improving energy efficiency. For that end, we propose a novel way to reduce such losses by embedding fan-outs in logic gates, making them partially reversible. Simulation results for state-of-the-art benchmarks indicate an average reduction of the fundamental energy limit by 44% without affecting the delay. If delay is not the main concern, the average reduction reaches even 77%. To the best of our knowledge, this paper presents the first post-synthesis strategy to reduce fundamental energy limits for field-coupled nanocomputing circuits by means of logic network changes.