Experimental Analysis and Calibration of Power Losses in High Efficiency SiC Converters

The efficiency characterization and optimization of multiple topologies for a given application requires accurate loss estimate from semiconductor devices and magnetics. With Silicon Carbide (SiC) based converters approaching over 99% efficiency, the need for accurate component loss data has become more critical, for reliable topology comparison. Although manufacturers' datasheets provide power loss data, that data is limited to a set of operating conditions and typically measured under optimistic conditions. In this paper, the considerations while relying on datasheet to estimate the power semiconductor and magnetics losses are presented. Also, simple experimental calibration methods are provided to identify and resolve the possible mismatches while using the datasheet information to estimate converter efficiency. The relevant simulations studies have been carried out on PLECS, which includes power loss models of power semiconductors and magnetics. Experiments have been carried out on a 1.2kV SiC MOSFET based 4.6kW - single phase (equivalent to 13.8kW - three phase) converter operated in dc-ac-dc back-to-back configuration, for high fidelity efficiency measurements. Also a double pulse test (DPT) setup has been designed to characterize the semiconductor losses in the three level T-type converters.