Design-For-Reliability Flow in 7nm Products with Data Center and Automotive Applications

We improved Design-For-Reliability (DFR) flow in the 7nm technology node for data center and automotive applications. Thermal issues are estimated in the design stage to meet the reliability target for high power applications. We estimate the Middle-End-Of-Line (MEOL) / Back-End-Of-Line (BEOL) length of the whole chip with voltage information to guarantee reliability of extremely large chips. Impact of package components on product reliability should be considered to meet the automotive application target. Aging simulations need to be checked more carefully when positive feedback is expected.