A Memristor-Based In-Memory Computing Network for Hamming Code Error Correction

Hamming code is a linear error-correcting code widely used in memory and telecommunication. For the first time, here we put forth an approach to analyzing Hamming codes in hardware using networks consisting of memristors. Such networks are capable of detecting and correcting potential bit errors in Hamming codes in a high-speed and energy-efficient way, where the parity-check matrix is stored in the memristor crossbar array and the syndrome vector is represented by the states of the output unipolar memristors whose resistance flipping naturally implements vector-matrix multiplication with modulo 2. Our experimental results demonstrate that the output syndrome vector is able to correctly represent the position of the bit error whenever it exists, and subsequent correction can thus be applied by flipping the bit identified. The energy consumption using the present network has decreased by >100 times compared with GPU while >1000 times compared with CPU.