A New security Approach to Support the operations of ECC and AES Algorithms on FPGA

The growth of embedded systems makes it deemed needful to furnish security services for such applications. High safety and high speed of data transmission with less hardware resources become much more significant. In this paper, we propound an efficient hybrid cryptosystem that mixes benefits of the symmetric algorithms to speed up data encryption and the asymmetric encryption scheme to secure the exchange of symmetric session key. The aim of this work is to extend an asymmetric cryptosystem to support also a symmetric algorithm, and we assess our proposed design on DE2-115 board. We suggested a novel functional unit which extends the polynomial modular multiplication of Elliptic Curve cryptography (ECC) to calculate also the polynomial arithmetic operations of Advanced Encryption Standard (AES). Results show that the proposed design allows a trade-of between speed, area and power dissipation.