Robust Control of Overlay Errors in Photolithography Processes

Overlay errors depict misalignment between neighboring pattern layers on the wafer and are a critical measure of quality in lithography processes. In addition, stack-up overlay errors, which describe misalignments across non-neighboring layers, have also been shown to be important for product performance. Models relating overlay errors to tool parameters are the foundation of control methods that utilize in-process error measurements to adapt controllable parameters to minimize those errors. Unfortunately, these models are subject to noise and modeling errors whose characteristics cannot be accurately modeled, in that assumptions of Gaussianity or independence of noise terms, or perfect knowledge of model parameters cannot be ascertained. This paper proposes a methodology for robust control of lithography errors that is capable of handling parametric uncertainties in overlay models, as well as shortcomings in describing the noise and modeling errors. A series of simulations was conducted using a model available in the literature, as well as a model and data from a major 300 mm semiconductor fab. The results illustrate advantages of the proposed robust approach, with benefits increasing with higher levels of uncertainties. The results also depict specific improvements of errors in outer regions of the wafer, which are known to suffer from lower yields.