A High PSRR, Stable CMOS Current Reference using Process Insensitive TC of Resistance for Wide Temperature Applications

In this paper, a highly stable all CMOS current reference against temperature and supply variation is proposed. Current reference of 5μA and 50nA has been designed for low power and ultra-low power applications respectively. The reference architecture is based on ratio between the PTAT voltage and the PTAT resistance. The process insensitive temperature compensation is accomplished by dividing TC of voltage with process insensitive TC of resistor. A high PSRR, process independent voltage reference is designed for PTAT voltage. N-poly on chip resistor is used for PTAT resistance. The proposed current reference is implemented in 0.18-μm TSMC technology. The architecture achieved PSRR of 74dB and line sensitivity of 0.05% works at supply voltage variation from 1.4V to 3.6V. The current reference of 5μA and 50nA attain temperature coefficient of 11.6 ppm/°C and 12.2 ppm/°C respectively for the temperature variation of -55° C to 125° C.