The Design of a 28GHz Mixer-Embedded Frequency Shifting PLL in 65nm CMOS with Low In-Band Phase Noise

A 26-30GHz mixer-embedded frequency shifting (MEFS) PLL is proposed in this paper. As the multiplication factor N is significantly reduced in the main loop, the MEFS PLL exhibits much lower in-band phase noise than the convention PLL. An additional LO PLL is exerted to provide a 25-29GHz LO signal with its in-band phase noise being partially suppressed by the frequency divider in Main PLL. This design exhibits in-band phase noise of -99.03dBc/Hz@100kHz offset at 28GHz. The overall integrated phase noise is -37.61dBc and the jitter is 105.84fs.