An Ultra-Low Power Sigma-Delta Neuron Circuit

Neural processing systems typically represent data using Leaky Integrate and Fire (LIF) neuron models that generate spikes or pulse trains at a rate proportional to their input amplitudes. This mechanism requires high firing rates when encoding time-varying signals, leading to increased power consumption. Neuromorphic systems that use adaptive LIF neuron models overcome this problem by encoding signals in the relative timing of their output spikes rather than their rate. In this paper, we analyze recent adaptive LIF neuron circuit implementations and highlight the analogies and differences between them and a first-order ΣΔ feedback loop. We propose a new ΣΔ neuron circuit that addresses some of the limitations in existing implementations and present simulation results that quantify the improvements. We show that the new circuit, implemented in a 1.8V, 180nm CMOS process, offers up to 42dB Signal to Distortion Ratio (SDR) and consumes orders of magnitude lower energy. Finally, we also demonstrate how the sigma-delta interpretation enables mapping of real-valued Recurrent Neural Networks (RNNs) to the spiking framework to emphasize the envisioned application of the proposed circuit.