Design of Approximate Restoring Dividers

In this paper, two approximation models are proposed for restoring divider. In the first design, approximation is performed at circuit level, where exact restoring divider cells are replaced by approximate restoring divider cells by simplifying the logic equations. In the second model, restoring divider is analysed strategically and number of restoring divider cells are reduced by finding the portions of divisor and dividend with significant information. An approximation factor p is used in both designs. In model 1, the design with p = 8 has a 75% reduction in both area and power consumption compared to exact design, with a Q-MRED of 1.909 × 10^-2 and Q-NMED of 0.449 × 10^-2. The second model with an approximation factor p = 4 has 52% area savings and 61% power savings compared to exact design. The proposed models are found to have better error metrics compared to existing approximate designs, with better area and power savings at similar error values. A change detection image processing application is used for real time assessment of proposed and existing approximate dividers and one of the models achieves a PSNR of 54.27 dB.