Post-process local porous silicon integration method for RF application

The interest of porous silicon (PSi) for RF applications has been widely demonstrated in many previous works. In most of them, PSi is integrated into the substrate during its fabrication (PRE-PSi) prior to a standard process (e.g. CMOS). Such PRE-PSi technology has major incompatibilities with foundry-level processes (mechanical instability during annealing, warp, bow, etc.). This paper presents an innovative technique of post device fabrication integration of porous silicon (POST-PSi) with the substrate to overcome these incompatibilities. Furthermore, the frontside is not involved in porous layer growth and therefore the integrity of the RF circuitry is not impacted by the POST-PSi process. Additionally, the novel technique allows for local porosification, enabling local pockets of high-quality RF PSi-substrate, beneath the RF devices of interest, to be embedded within a structurally stable silicon crystalline bulk. Similar to PRE-PSi, the POST-PSi substrates are produced by anodization starting from the most widespread highly doped milliohm-centimeter Si wafers. A comparison of the RF performances with various advanced trap-rich (TR) silicon-on-insulator (SOI) and PRE-PSi substrates are presented. In addition to its compatibility with standard microfabrication processes and stable final structure, POST-PSi provides characteristics of low losses, high isolation and very high linearity, unmatched by any other silicon-based substrate.