FPGA Implementation of FM Demodulators Using RTL-SDR

With the advancements in modern communication technology, newer hardware is developed to replace the current technology. This leads to a significant increase in cost of communication systems. Thus, `software-controlled' and `software-defined' hardware, for implementing communication system processes were developed. This research work revolves around the idea of developing a powerful, re-configurable tool capable of implementing multiple communication systems on-chip via software. The overall system developed here is referred to as a `Reconfigurable Receiver'. The receiver utilizes RTL-SDR(R820T+RTL2832U) by Oscmocom and Spartan 3AN FPGA for implementing FIR filters and demodulating architectures. Such a system offers a greater flexibility over dedicated hardware. The work presented here includes the theoretical background and description of the process flow for developing such systems. Also, various performance parameters are discussed. The system described here is designed to demodulate FM signals from local FM stations.