Modeling and forecasting of manufacturing variations

Manufacturing process variations cause design performance fluctuations and if not accounted for can cause the design to fail to meet performance and/or correctness criteria. These variations are fundamentally different from the unusual contamination-related defects which cause structural changes in the integrated circuit such as shorts or opens between conductors. Using statistical design analysis and optimization techniques, designers can use information about the statistical distribution of electrical parameters to predict and possibly mitigate the impact of manufacturing variability. Key to such analysis efforts, however, is an understanding of the modeling and characterization of parameter variability. In recent technology generations, the emphasis on reduced time to market often results in the simultaneous design of an integrated circuit and the fabrication process in which it will be built. This codesign situation results in the need for variability forecasting. This tutorial starts with a review of the sources and impacts of parameter variability, stressing the difference between intra-die and inter-die variations. The tutorial then discusses existing methods for statistical parameter characterization, and closes with some trends and forecasts for variability in the coming technology nodes.